Application: The output of each flip-flop in the long code generator is combined in AND-gates with the bits of a long code mask assigned to each user, paging, and Access Channel as shown in the figure below. The chip sequence realized at each flip-flop is merely a delayed version of the chip sequence at the other flip-flops. Modulo-2 adding the various flip-flop outputs produces a PN sequence which is the sum of delayed or shifted versions of each other. The sum of delayed or shifted versions of a PN sequence is known to be another delay or shift of the same sequence. Hence, the output of the modulo-2 adder is some shift of the long code with the shift being determined by the mask. Any mask bit which is a logical zero means that the corresponding flip-flop output or shift is not input to the modulo-2 adder. Each mask produces a time offset in the long PN code which is used to identify individual users, paging, and Access Channels.

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