Application: IS-95 uses two different decimators. One in the forward-link paging channels and two in the traffic channels. The decimator in the paging channel and one in the traffic channel take their inputs from the long code generator at the chip rate of 1.2288 Mchips/sec and decimate by a factor 64. That is, every 64th long code chip is passed to the decimator output and repeated 63 times. The result is an output whose rate equals 1.2288x106/64 or 19,200. This rate matches the symbol rate and allows the symbols to be scrambled for privacy by the decimated random chips from the long code generator. The input to the second decimator in the traffic channel is the output of the decimator which produces 19,200 chips/sec. This second decimator passes every 24th input chip to its output and repeats it 23 times to produce a chip stream at the rate 19,200/24 or 800 chips/sec. These chips at 800 chips/sec are used to select the position of the power control bits sent on the forward traffic channel.